Phase Lock Loop System Design Theory and Principles RAHRF469
04/30/2020 Although this course is open for enrollment, we have only uploaded 2.5 hour of the content and we would be releasing more lectures on monthly basis as we go
05/01/2020: Please note this open ended and on monthly basis we would be adding more content to it until topic is completed
06/07/2020 added another 2 hour including ADS Keysight and MATLAB examples
12/25/2020 added PLL phase noise
This course focuses on phase locked loops (PLL) theory and behavioral modeling. PLLs are one of the most important blocks in RF communication transceiver systems. PLL systems exist in variety of high frequency applications, from simple clock circuits, to local oscillators (LOs) for high performance radio communication links, and ultra-fast switching frequency synthesizers in vector network analyzers (VNA). This course explains different types of PLLs with detailed explanations on individual sub-blocks. It includes PLL design and calculations with lots of examples and homework. There are also system level simulations and behavioral design using Advanced Design System (ADS) software. Phase noise of PLL is discussed in this course using equations, systems analysis, and there are tutorials that guide you to simulate the behavioral phase noise model of PLL and observe the system impact on VCO phase noise. There are also discussion about fractional PLL concept and features in this course.
It is important to remind you that this course covers the circuit analysis of PLL sub-blocks however, it does not include any transistor level simulation and this topic will be covered on different course which will be released by Rahsoft in future.
Prerequisites and topics you need to be familiar with for this course are:
- Electronics and analog circuit design (intermediate level)
- Control Theory (basic level)
- ADS software
Concepts such as:
- Open and closed Loop gain
- Open loop – close loop systems
- Feedback
- Transfer function
- Phase margin
- CMOS transistor
- Basic op amp
- Laplace transform
- Please be advised that this course contains more math than previous courses.
- PLL system design requires an understanding of transfer function derivations and stability analysis which needs system calculations and involves university level mathematical calculations.
Instructor: Ata Sarrafi
Advisor: Ahsan Ghoncheh
Course Features
- Lectures 32
- Quizzes 0
- Duration 5.5 hour
- Skill level intermediate
- Language English
- Students 138
- Certificate Yes
- Assessments Yes
You have 900 weeks remaining for the course
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PLL Basics
PLL Basics
- RAHRF469 Before We Start
- logo
- 11.1.1.1 Why do we need PLL ?
- 11.1.1.2 PLL introduction
- 11.1.1.3 Ripple problem solution
- 11.1.2.1 PLL blocks – PD
- 11.1.2.2 PLL loop operation
- 11.1.2.3 PLL Transfer function
- 11.1.2.4 Phase margin consideration
- 11.1.2.5 Design Example
- 11.1.2.6 Frequency multiplication- practical PLL
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PLL Types and Behavioral Simulation
- 11.1.3.1 Type-I PLL
- 11.2.1.1 Type-II PLL – PFD
- 11.2.1.2 Charge Pump
- 11.2.1.3 PFD/CP Behavioral Simulation
- 11.2.1.4 Change Pump PLL (CPLL) Transfer Function
- 11.2.1.5 Stability of simple CPPLL
- 11.2.1.6 Open loop bandwidth and Phase margin (PM)
- 11.2.1.7 Numerical Example (MATLAB)
- 11.2.1.8 Close Loop system Consideration
- 11.2.1.9 Higher order PLL
- 11.2.1.10 Higher order PLL in MATLAB
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Higher Order PLL
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ADS simulation
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PLL Phase noise
- 11.5.1.1 PLL phase noise – Review of phase noise
- 11.5.1.2 Free running VCO phase noise ADS simulation
- 11.5.2.1 Phase noise sources in PLL and transfer function VCO phase noise
- 11.5.2.2 PLL Spurs: Spur Suppression vs Phase Noise Reduction
- 11.5.2.3 Phase Noise Sources in PLL and transfer function reference Phase Noise
- 11.5.2.4 Jitter and Phase Noise relationship
